Datasheet

19.7.3 TIMSK – Timer/Counter Interrupt Mask Register

Name: TIMSK

Offset: 0x39 [ID-00000312]

Reset: 0

Property: When addressing I/O Registers as data space the offset address is 0x59

When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When

addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset

addresses.

Bit 7 6 5 4 3 2 1 0

TOIE0

Access

R/W

Reset 0

Bit 0 – TOIE0 Timer/Counter0 Overflow Interrupt Enable.

When the TOIE0 bit is written to one, and the I-bit in the Status Register is set (one), the Timer/Counter0

Overflow interrupt is enabled. The corresponding interrupt is executed if an overflow in Timer/Counter0

occurs, i.e., when the TOV0 bit is set in the Timer/Counter Interrupt Flag Register – TIFR.

AVR 8-Bit Microcontroller

8-bit Timer/Counter0

Datasheet Complete

40001974A-page 109