Datasheet

ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
274
Figure 29-3. SPI Interface Timing Requirements (Master Mode)
Figure 29-4. SPI Interface Timing Requirements (Slave Mode)
6
MSB
SS
SCK
(CPOL = 0)
SCK
(CPOL = 1)
MISO
(Data Input)
MOSI
(Data Output)
MSB LSB
LSB
...
...
45
8
7
1
2
2
3
9
MSB
SS
SCK
(CPOL = 0)
SCK
(CPOL = 1)
MOSI
(Data Input)
MISO
(Data Output)
MSB LSB X
LSB
...
...
13
14
17
15
10
16
11
11
12