Datasheet
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
168
20.9 Multi-processor Communication Mode
Setting the multi-processor communication mode (MPCMn) bit in UCSRnA enables a filtering function of incoming frames
received by the USART receiver. Frames that do not contain address information will be ignored and not put into the receive
buffer. This effectively reduces the number of incoming frames that has to be handled by the CPU, in a system with multiple
MCUs that communicate via the same serial bus. The transmitter is unaffected by the MPCMn setting, but has to be used
differently when it is a part of a system utilizing the multi-processor communication mode.
If the receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indicates if the frame contains
data or address information. If the receiver is set up for frames with nine data bits, then the ninth bit (RXB8n) is used for
identifying address and data frames. When the frame type bit (the first stop or the ninth bit) is one, the frame contains an
address. When the frame type bit is zero the frame is a data frame.
The multi-processor communication mode enables several slave MCUs to receive data from a master MCU. This is done by
first decoding an address frame to find out which MCU has been addressed. If a particular slave MCU has been addressed,
it will receive the following data frames as normal, while the other slave MCUs will ignore the received frames until another
address frame is received.
20.9.1 Using MPCMn
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZn = 7). The ninth bit (TXB8n) must be
set when an address frame (TXB8n = 1) or cleared when a data frame (TXB = 0) is being transmitted. The slave MCUs must
in this case be set to use a 9-bit character frame format.
The following procedure should be used to exchange data in multi-processor communication mode:
1. All slave MCUs are in multi-processor communication mode (MPCMn in
UCSRnA is set).
2. The master MCU sends an address frame, and all slaves receive and read this frame. In the Slave MCUs, the
RXCn Flag in UCSRnA will be set as normal.
3. Each slave MCU reads the UDRn register and determines if it has been selected. If so, it clears the MPCMn bit in
UCSRnA, otherwise it waits for the next address byte and keeps the MPCMn setting.
4. The addressed MCU will receive all data frames until a new address frame is received. The other slave MCUs,
which still have the MPCMn bit set, will ignore the data frames.
5. When the last data frame is received by the addressed MCU, the addressed MCU sets the MPCMn bit and waits
for a new address frame from master. The process then repeats from 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the receiver must change between
using n and n+1 character frame formats. This makes full-duplex operation difficult since the transmitter and receiver uses
the same character size setting. If 5- to 8-bit character frames are used, the transmitter must be set to use two stop bit
(USBSn = 1) since the first stop bit is used for indicating the frame type.
Do not use read-modify-write instructions (SBI and CBI) to set or clear the MPCMn bit. The MPCMn bit shares the same I/O
location as the TXCn flag and this might accidentally be cleared when using SBI or CBI instructions.
20.10 Examples of Baud Rate Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for asynchronous operation can be
generated by using the UBRRn settings in Table 20-4. UBRRn values which yield an actual baud rate differing less than
0.5% from the target baud rate, are bold in the table. Higher error ratings are acceptable, but the receiver will have less noise
resistance when the error ratings are high, especially for large serial frames (see Section 20.8.3 “Asynchronous Operational
Range” on page 167). The error values are calculated using the following equation:
Error[%]
BaudRate
Closest Match
BaudRate
--------------------------------------------------
1–
100%=