Datasheet

ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
98
Figure 16-1. 16-bit Timer/Counter Block Diagram
(1)
Note: 1. Refer to Figure 1-1 on page 3, Table 14-3 on page 71 and Table 14-9 on page 76 for Timer/Counter1 pin place-
ment and description.
Control Logic
TCNTn
Timer/Counter
Count
Clear
Direction
clk
Tn
OCRnA
OCRnB
ICRn
TCCRnA TCCRnB
=
Edge
Detector
(from Prescaler)
Clock Select
TOP BOTTOM
TOVn (Int. Req.)
OCnA (Int. Req.)
Tn
Waveform
Generation
Fixed
TOP
Values
DATA BUS
=
= = 0
OCnA
OCnB (Int. Req.)
Waveform
Generation
Noise
Canceler
OCnB
(From Analog
Comparator Output)
ICFn (Int. Req.)
Edge
Detector
ICPn