Datasheet

43
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
Figure 11-3. MCU Start-up, RESET Extended Externally
11.4 External Reset
An external reset is generated by a low level on the RESET pin. Reset pulses longer than the minimum pulse width (see
Section 29.5 “System and Reset Characteristics” on page 272) will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset. When the applied signal reaches the reset threshold voltage – V
RST
– on its
positive edge, the delay counter starts the MCU after the time-out period – t
TOUT
– has expired. The external reset can be
disabled by the RSTDISBL fuse, see Table 28-6 on page 253.
Figure 11-4. External Reset During Operation
11.5 Brown-out Detection
The Atmel
®
ATmega48PA/88PA/168PA has an on-chip brown-out detection (BOD) circuit for monitoring the V
CC
level during
operation by comparing it to a fixed trigger level. The trigger level for the BOD can be selected by the BODLEVEL fuses. The
trigger level has a hysteresis to ensure spike free brown-out detection. The hysteresis on the detection level should be
interpreted as V
BOT+
= V
BOT
+ V
HYST
/2 and V
BOT-
= V
BOT
– V
HYST
/2.When the BOD is enabled, and V
CC
decreases to a value
below the trigger level (V
BOT-
in Figure 11-5), the brown-out reset is immediately activated. When V
CC
increases above the
trigger level (V
BOT+
in Figure 11-5), the delay counter starts the MCU after the time-out period t
TOUT
has expired.
The BOD circuit will only detect a drop in V
CC
if the voltage stays below the trigger level for longer than t
BOD
given in
Section 29.5 “System and Reset Characteristics” on page 272.
Figure 11-5. Brown-out Reset During Operation
V
CC
RESET
INTERNAL
RESET
TIME-OUT
V
RST
t
TOUT
V
POT
t
TOUT
RESET
V
CC
INTERNAL
RESET
TIME-OUT
V
RST
V
BOT-
V
BOT+
t
TOUT
V
CC
RESET
INTERNAL
RESET
TIME-OUT