Datasheet

ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
260
28.7.5 Programming the EEPROM
The EEPROM is organized in pages, see Table 28-10 on page 255. When programming the EEPROM, the program data is
latched into a page buffer. This allows one page of data to be programmed simultaneously. The programming algorithm for
the EEPROM data memory is as follows (refer to Section 28.7.4 “Programming the Flash” on page 258 for details on
command, address and data loading):
1. A: Load command “0001 0001”.
2. G: Load address high byte (0x00 - 0xFF).
3. B: Load address low byte (0x00 - 0xFF).
4. C: load data (0x00 - 0xFF).
5. E: Latch data (give PAGEL a positive pulse).
K: Repeat 3 through 5 until the entire buffer is filled.
L: Program EEPROM page
1. Set BS1 to “0”.
2. Give WR
a negative pulse. This starts programming of the EEPROM page. RDY/BSY goes low.
3. Wait until to RDY/BSY
goes high before programming the next page (See Figure 28-4 for signal waveforms).
Figure 28-4. Programming the EEPROM Waveforms
28.7.6 Reading the Flash
The algorithm for reading the flash memory is as follows (refer to Section 28.7.4 “Programming the Flash” on page 258 for
details on command and address loading):
1. A: Load command “0000 0010”.
2. G: Load address High Byte (0x00 - 0xFF).
3. B: Load address Low Byte (0x00 - 0xFF).
4. Set OE
to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.
5. Set BS1 to “1”. The Flash word high byte can now be read at DATA.
6. Set OE
to “1”.
0x11
AG
DATA
XA1
XA0
BS1
BS2
XTAL1
WR
PAGEL
RDY/BSY
OE
RESET +12V
BC
ADDR. LOW ADDR. LOW
B
DATA XX
CE
K
XXDATA
EL
ADDR. HIGH