Datasheet

ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
244
Similarly, when reading the fuse high byte, load 0x0003 in the Z-pointer. When an LPM instruction is executed within three
cycles after the BLBSET and SELFPRGEN bits are set in the SPMCSR, the value of the fuse high byte (FHB) will be loaded
in the destination register as shown below. Refer to Table 28-6 on page 253 for detailed description and mapping of the fuse
high byte.
When reading the extended fuse byte, load 0x0002 in the Z-pointer. When an LPM instruction is executed within three cycles
after the BLBSET and SELFPRGEN bits are set in the SPMCSR, the value of the extended fuse byte (EFB) will be loaded in
the destination register as shown below. Refer to Table 28-5 on page 253 for detailed description and mapping of the
extended fuse byte.
Fuse and lock bits that are programmed, will be read as zero. Fuse and lock bits that are unprogrammed, will be read as
one.
27.8.10 Reading the Signature Row from Software
To read the signature row from software, load the Z-pointer with the signature byte address given in Table 27-5 and set the
SIGRD and SELFPRGEN bits in SPMCSR. When an LPM instruction is executed within three CPU cycles after the SIGRD
and SELFPRGEN bits are set in SPMCSR, the signature byte value will be loaded in the destination register. The SIGRD
and SELFPRGEN bits will auto-clear upon completion of reading the signature row lock bits or if no LPM instruction is
executed within three CPU cycles. When SIGRD and SELFPRGEN are cleared, LPM will work as described in the
Instruction set manual.
27.8.11 Preventing Flash Corruption
During periods of low V
CC
, the flash program can be corrupted because the supply voltage is too low for the CPU and the
flash to operate properly. These issues are the same as for board level systems using the flash, and the same design
solutions should be applied.
A flash program corruption can be caused by two situations when the voltage is too low. First, a regular write sequence to
the flash requires a minimum voltage to operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the
supply voltage for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is sufficient):
1. If there is no need for a boot loader update in the system, program the boot loader lock bits to prevent any boot
loader software updates.
2. Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can be done by
enabling the internal brown-out detector (BOD) if the operating voltage matches the detection level. If not, an
external low V
CC
reset protection circuit can be used. If a reset occurs while a write operation is in progress, the
write operation will be completed provided that the power supply voltage is sufficient.
Bit 76543210
Rd FHB7 FHB6 FHB5 FHB4 FHB3 FHB2 FHB1 FHB0
Bit 76543210
Rd – – – – EFB3 EFB2 EFB1 EFB0
Table 27-5. Signature Row Addressing
Signature Byte Z-Pointer Address
Device signature byte 1 0x0000
Device signature byte 2 0x0002
Device signature byte 3 0x0004
RC oscillator calibration byte 3V 0x0001
TS_ADC_25_L - Temp sensor value at 25°C - low byte 0x0005
TS_ADC_25_H - Temp sensor value at 25°C - high byte 0x0007
RC oscillator calibration byte 5V 0x0009
Note: All other addresses are reserved for future use