Datasheet

turned on again, the user must allow the reference to start-up before the output is used. If the reference is

kept on in Sleep mode, the output can be used immediately.

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15. System Control and Reset

14.10.6 Port Pins

When entering a sleep mode, all port pins should be configured to use minimum power. The most

important is then to ensure that no pins drive resistive loads. In sleep modes where both the I/O clock

(clk

I/O

) and the ADC clock (clk

ADC

) are stopped, the input buffers of the device will be disabled. This

ensures that no power is consumed by the input logic when not needed. In some cases, the input logic is

needed for detecting wake-up conditions, and it will then be enabled. Refer to the section Digital Input

Enable and Sleep Modes for details on which pins are enabled. If the input buffer is enabled and the input

signal is left floating or have an analog signal level close to V

/2, the input buffer will use excessive

power.

For analog input pins, the digital input buffer should be disabled at all times. An analog signal level close

to V

/2 on an input pin can cause significant current even in active mode. Digital input buffers can be

disabled by writing to the Digital Input Disable Registers (DIDR0 for ADC, DIDR1 for AC).