Datasheet
14. Power Management and Sleep Modes
14.1. Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power.
The AVR provides various sleep modes allowing the user to tailor the power consumption to the
application’s requirements.
Figure Clock Distribution in section Clock Systems and their Distribution presents the different clock
systems in the ATmega64A, and their distribution. The figure is helpful in selecting an appropriate sleep
mode. The table below shows the different clock options and their wake-up sources.
Table 14-1 Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains
Oscillators Wake-up Sources
Sleep
Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
Main
Clock
Source
Enabled
Timer
Osc.
Enabled
INT1/
INT0
TWIAddress
Match
Timer0 SPM/
EEPROM
Ready
ADC Other
I/O
Idle X X X X X
(2)
X X X X X X
ADC
Noise
Reduction
X X X X
(2)
X
(3)
X X X X
Power-
down
X
(3)
X
Power-
save
X
(2)
X
(2)
X
(3)
X X
(2)
Standby
(1
)
X X
(3)
X
Extended
Standby
(1
)
X
(2)
X X
(2)
X
(3)
X X
(2)
Note:
1. External Crystal or resonator selected as clock source.
2. If AS0 bit in ASSR is set.
3. Only INT3:0 or level interrupt INT7:4.
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register select which sleep
mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or Extended Standby) will be
activated by the SLEEP instruction. See Table 14-2 Sleep Mode Select on page 66 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then
halted for four cycles in addition to the start-up time, it executes the interrupt routine, and resumes
execution from the instruction following SLEEP. The contents of the Register File and SRAM are
unaltered when the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up
and executes from the Reset Vector.
Related Links
Clock Systems and their Distribution on page 52
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
61