Datasheet

25.2. Overview...................................................................................................................................245
25.3. Clock Generation......................................................................................................................247
25.4. Frame Formats.........................................................................................................................250
25.5. USART Initialization..................................................................................................................251
25.6. Data Transmission – The USART Transmitter......................................................................... 252
25.7. Data Reception – The USART Receiver.................................................................................. 255
25.8. Asynchronous Data Reception.................................................................................................258
25.9. Multi-Processor Communication Mode.....................................................................................261
25.10. Examples of Baud Rate Setting............................................................................................... 262
25.11. Register Description................................................................................................................. 265
26. TWI - Two-wire Serial Interface............................................................................. 274
26.1. Features................................................................................................................................... 274
26.2. Overview...................................................................................................................................274
26.3. Two-Wire Serial Interface Bus Definition..................................................................................276
26.4. Data Transfer and Frame Format.............................................................................................277
26.5. Multi-master Bus Systems, Arbitration and Synchronization....................................................280
26.6. Using the TWI...........................................................................................................................281
26.7. Multi-master Systems and Arbitration.......................................................................................298
26.8. Register Description................................................................................................................. 299
27. Analog Comparator............................................................................................... 306
27.1. Overview...................................................................................................................................306
27.2. Analog Comparator Multiplexed Input...................................................................................... 306
27.3. Register Description................................................................................................................. 307
28. ADC - Analog to Digital Converter......................................................................... 311
28.1. Features....................................................................................................................................311
28.2. Overview...................................................................................................................................311
28.3. Starting a Conversion...............................................................................................................313
28.4. Prescaling and Conversion Timing...........................................................................................314
28.5. Changing Channel or Reference Selection.............................................................................. 317
28.6. ADC Noise Canceler................................................................................................................ 318
28.7. ADC Conversion Result............................................................................................................322
28.8. Register Description................................................................................................................. 324
29. JTAG Interface and On-chip Debug System..........................................................335
29.1. Features................................................................................................................................... 335
29.2. Overview...................................................................................................................................335
29.3. TAP – Test Access Port............................................................................................................336
29.4. TAP Controller.......................................................................................................................... 337
29.5. Using the Boundary-scan Chain...............................................................................................338
29.6. Using the On-chip Debug System............................................................................................ 338
29.7. On-chip Debug Specific JTAG Instructions.............................................................................. 339
29.8. Using the JTAG Programming Capabilities.............................................................................. 340
29.9. Bibliography..............................................................................................................................340
29.10. IEEE 1149.1 (JTAG) Boundary-scan........................................................................................340
29.11. Data Registers..........................................................................................................................341
29.12. Boundry-scan Specific JTAG Instructions................................................................................ 343
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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