Datasheet

12.7.7. XMCRB – External Memory Control Register B
Name: XMCRB
Offset: 0x6C
Reset: 0x00
Property: –
Bit 7 6 5 4 3 2 1 0
XMBK XMM2 XMM1 XMM0
Access
R/W R/W R/W R/W
Reset 0 0 0 0
Bit 7 – XMBK: External Memory Bus-keeper Enable
Writing XMBK to one enables the bus keeper on the AD7:0 lines. When the bus keeper is enabled, it will
ensure a defined logic level (zero or one) on AD7:0 when they would otherwise be tri-stated. Writing
XMBK to zero disables the bus keeper. XMBK is not qualified with SRE, so even if the XMEM interface is
disabled, the bus keepers are still activated as long as XMBK is one.
Bits 2:0 – XMMn: External Memory High Mask [n = 2:0]
When the External Memory is enabled, all Port C pins are default used for the high address byte. If the
full 60Kbytes address space is not required to access the External Memory, some, or all, Port C pins can
be released for normal Port Pin function as described in the table below. As described in Using all 64
Kbytes Locations of External Memory on page 40, it is possible to use the XMMn bits to access all
64Kbytes locations of the External Memory.
Table 12-5 Port C Pins Released as Normal Port Pins when the External Memory is Enabled
XMM2 XMM1 XMM0 # Bits for External Memory Address Released Port
Pins
0 0 0 8 (Full 60 Kbytes space) None
0 0 1 7 PC7
0 1 0 6 PC7 - PC6
0 1 1 5 PC7 - PC5
1 0 0 4 PC7 - PC4
1 0 1 3 PC7 - PC3
1 1 0 2 PC7 - PC2
1 1 1 No Address high bits Full Port C
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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