Datasheet

Figure 32-9 External Memory Timing (SRWn1 = 0, SRWn0 = 1)
ALE
T1 T2 T3
Write
Re a d
WR
T5
A15:8
Addre s s
Prev. a ddr.
DA7:0
Addre s s
Data
Prev. da ta
XX
RD
DA7:0 (XMBK = 0)
Data
Addre s s
Sys te m Clock (CLK
CPU
)
1
4
2
7
6
3a
3b
5
8 12
16
13
10
11
14
15
9
T4
Figure 32-10 External Memory Timing (SRWn1 = 1, SRWn0 = 0)
ALE
T1 T2 T3
Write
Read
WR
T6
A15:8
Address
Prev. addr.
DA7:0
Address DataPrev. data
XX
RD
DA7:0 (XMBK = 0)
Data
Address
System Clock (CLK
CPU
)
1
4
2
7
6
3a
3b
5
8 12
16
13
10
11
14
15
9
T4
T5
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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