Datasheet

Table 32-18 External Data Memory Characteristics, 2.7V - 5.5 V, SRWn1 = 1, SRWn0 = 1
Symbol Parameter 4MHz Oscillator Variable Oscillator Unit
Min Max Min Max
0 1/t
CLCL
Oscillator Frequency 0.0 8 MHz
10 t
RLDV
Read Low to Data Valid 690 3.0t
CLCL
-60 ns
12 t
RLRH
RD Pulse Width 735 3.0t
CLCL
-15 ns
14 t
WHDX
Data Hold After WR High 485 2.0t
CLCL
-15 ns
15 t
DVWH
Data Valid to WR High 750 3.0t
CLCL
ns
16 t
WLWH
WR Pulse Width 735 3.0t
CLCL
-15 ns
Figure 32-8 External Memory Timing (SRWn1 = 0, SRWn0 = 0
ALE
T1 T2 T3
Write
Re a d
WR
T4
A15:8
Addre s s
Prev. a ddr.
DA7:0
Addre s s DataP rev. da ta
XX
RD
DA7:0 (XMBK = 0)
Data
Addre s s
Sys te m Clock (CLK
CPU
)
1
4
2
7
6
3a
3b
5
8 12
16
13
10
11
14
15
9
Atmel ATmega64A [DATASHEET]
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