Datasheet

12.7.2. EEARH – The EEPROM Address Register High
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: EEARH
Offset: 0x1F
Reset: 0xXX
Property: When addressing I/O Registers as data space the offset address is 0x3F
Bit 7 6 5 4 3 2 1 0
EEAR10 EEAR9 EEAR8
Access
R/W R/W R/W
Reset x x x
Bit 2 – EEAR10: EEPROM Address
Bit 1 – EEAR9: EEPROM Address
Bit 0 – EEAR8: EEPROM Address
Refer to EEARL on page 42.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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