Datasheet

12.7.1. EEARL – The EEPROM Address Register Low
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: EEARL
Offset: 0x1E
Reset: 0xXX
Property: When addressing I/O Registers as data space the offset address is 0x3E
Bit 7 6 5 4 3 2 1 0
EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset x x x x x x x x
Bits 7:0 – EEARn: EEPROM Address [n = 7:0]
The EEPROM Address Registers – EEARH and EEARL – specify the EEPROM address in the 2Kbytes
EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 2048. The initial value
of EEAR is undefined. A proper value must be written before the EEPROM may be accessed.
.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
42