Datasheet

26.8.3. TWSR – TWI Status Register
Name: TWSR
Offset: 0x71
Reset: 0xF8
Property: –
Bit 7 6 5 4 3 2 1 0
TWS7 TWS6 TWS5 TWS4 TWS3 TWPS1 TWPS0
Access
R R R R R R/W R/W
Reset 1 1 1 1 1 0 0
Bit 7 – TWS7: TWI Status Bit 7
The TWS[7:3] reflect the status of the TWI logic and the 2-wire Serial Bus. The different status codes are
described later in this section. Note that the value read from TWSR contains both the 5-bit status value
and the 2-bit prescaler value. The application designer should mask the prescaler bits to zero when
checking the Status bits. This makes status checking independent of prescaler setting. This approach is
used in this datasheet, unless otherwise noted.
Bit 6 – TWS6: TWI Status Bit 6
Bit 5 – TWS5: TWI Status Bit 5
Bit 4 – TWS4: TWI Status Bit 4
Bit 3 – TWS3: TWI Status Bit 3
Bits 1:0 – TWPSn: TWI Prescaler [n = 1:0]
These bits can be read and written, and control the bit rate prescaler.
Table 26-8 TWI Bit Rate Prescaler
TWPS1 TWPS0 Prescaler Value
0 0 1
0 1 4
1 0 16
1 1 64
To calculate bit rates, refer to Bit Rate Generator Unit on page 275. The value of TWPS1:0 is used in the
equation.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
303