Datasheet

12. AVR Memories
12.1. Overview
This section describes the different memories in the Atmel AVR ATmega64A. The AVR architecture has
two main memory spaces, the Data memory and the Program Memory space. In addition, the
ATmega64A features an EEPROM Memory for data storage. All three memory spaces are linear and
regular.
12.2. In-System Reprogrammable Flash Program Memory
The ATmega64A contains 64K bytes On-chip In-System Reprogrammable Flash memory for program
storage. Since all AVR instructions are 16- or 32-bits wide, the Flash is organized as 32K x 16 bits. For
software security, the Flash Program memory space is divided into two sections, Boot Program section
and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega64A Program
Counter (PC) is 15 bits wide, thus addressing the 32K Program memory locations. The operation of Boot
Program section and associated Boot Lock Bits for software protection are described in detail in Boot
Loader Support – Read-While-Write Self-Programming. Memory Programming contains a detailed
description on Flash Programming in SPI, JTAG, or Parallel Programming mode.
Constant tables can be allocated within the entire Program memory address space (see the LPM – Load
Program memory instruction description).
Timing diagrams for instruction fetch and execution are presented in Instruction Execution Timing.
Figure 12-1 Program Memory Map
$0000
$7FFF
Applica tion Fla s h Section
Boot Flas h S e ction
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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