Datasheet

26. TWI - Two-wire Serial Interface
26.1. Features
• Simple, yet Powerful and Flexible Communication Interface, only two Bus Lines Needed
• Both Master and Slave Operation Supported
• Device can Operate as Transmitter or Receiver
• 7-bit Address Space Allows up to 128 Different Slave Addresses
• Multi-master Arbitration Support
• Up to 400kHz Data Transfer Speed
• Slew-rate Limited Output Drivers
• Noise Suppression Circuitry Rejects Spikes on Bus Lines
• Fully Programmable Slave Address with General Call Support
• Address Recognition Causes Wake-up When AVR is in Sleep Mode
26.2. Overview
The TWI module is comprised of several submodules, as shown in the following figure. All registers
drawn in a thick line are accessible through the AVR data bus.
Figure 26-1 Overview of the TWI Module
TWI Unit
Address Register
(TW AR)
Address Match Unit
Address Compar ator
Control Unit
Control Register
(TWCR)
Status Register
(TWSR)
State Machine and
Status control
SCL
Sle w-r ate
Control
Spik e
Filter
SD A
Sle w-r ate
Control
Spik e
Filter
Bit Rate Gener ator
Bit Rate Register
(TWBR)
Prescaler
Bus Interf ace Unit
ST AR T / ST OP
Control
Arbitration detection Ack
Spik e Suppression
Address/Data Shift
Register (TWDR)
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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