Datasheet

25.11.3. UCSRmB – USART Control and Status Register B
Name: UCSRmB
Offset: 0x9A
Reset: 0x00
Property: –
Bit 7 6 5 4 3 2 1 0
RXCIEm TXCIEm UDRIEm RXENm TXENm UCSZm2 RXB8m TXB8m
Access
R/W R/W R/W R/W R/W R/W R R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 – RXCIEm: RX Complete Interrupt Enable
Writing this bit to one enables interrupt on the RXC flag. A USART Receive Complete interrupt will be
generated only if the RXCIE bit is written to one, the global interrupt flag in SREG is written to one and
the RXC bit in UCSRmA is set.
Bit 6 – TXCIEm: TX Complete Interrupt Enable
Writing this bit to one enables interrupt on the TXCm flag. A USARTm Transmit Complete interrupt will be
generated only if the TXCIEm bit is written to one, the global interrupt flag in SREG is written to one and
the TXCm bit in UCSRmA is set.
Bit 5 – UDRIEm: USART Data Register Empty Interrupt Enable
Writing this bit to one enables interrupt on the UDREm flag. A Data Register Empty interrupt will be
generated only if the UDRIEm bit is written to one, the global interrupt flag in SREG is written to one and
the UDREm bit in UCSRmA is set.
Bit 4 – RXENm: Receiver Enable
Writing this bit to one enables the USARTm Receiver. The Receiver will override normal port operation for
the RxDm pin when enabled. Disabling the Receiver will flush the receive buffer invalidating the FEm,
DORm and UPEm flags..
Bit 3 – TXENm: Transmitter Enable
Writing this bit to one enables the USARTm Transmitter. The Transmitter will override normal port
operation for the TxDm pin when enabled. The disabling of the Transmitter (writing TXENm to zero) will
not become effective until ongoing and pending transmissions are completed, that is, when the Transmit
Shift Register and transmit buffer register do not contain data to be transmitted. When disabled, the
transmitter will no longer override the TxDm port.
Bit 2 – UCSZm2: Character Size
The UCSZm2 bits combined with the UCSZm1:0 bit in UCSRmC sets the number of data bits (character
size) in a frame the Receiver and Transmitter use.
Bit 1 – RXB8m: Receive Data Bit 8
RXB8m is the ninth data bit of the received character when operating with serial frames with 9-data bits.
Must be read before reading the low bits from UDRm.
Bit 0 – TXB8m: Transmit Data Bit 8
TXB8m is the 9th data bit in the character to be transmitted when operating with serial frames with 9 data
bits. Must be written before writing the low bits to UDRm.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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