Datasheet

Bit 0 – C: Carry Flag
The Carry Flag C indicates a Carry in an arithmetic or logic operation. See the “Instruction Set
Description” for detailed information.
11.4. General Purpose Register File
The Register File is optimized for the Atmel AVR Enhanced RISC instruction set. In order to achieve the
required performance and flexibility, the following input/output schemes are supported by the Register
File:
• One 8-bit output operand and one 8-bit result input.
• Two 8-bit output operands and one 8-bit result input.
• Two 8-bit output operands and one 16-bit result input.
• One 16-bit output operand and one 16-bit result input.
The following figure shows the structure of the 32 general purpose working registers in the CPU.
Figure 11-2 AVR CPU General Purpose Working Registers
7
0
Addr.
R0
0x00
R1
0x01
R2
0x02
…
R13
0x0D
Genera l
R14
0x0E
Purpose
R15
0x0F
Working
R16
0x10
Registers
R17
0x11
…
R26
0x1A
X-re giste r Low Byte
R27
0x1B
X-re giste r High Byte
R28
0x1C
Y-re giste r Low Byte
R29
0x1D
Y-re giste r High Byte
R30
0x1E
Z-regis te r Low Byte
R31
0x1F
Z-regis te r High Byte
Most of the instructions operating on the Register File have direct access to all registers, and most of
them are single cycle instructions.
As shown in the figure above, each register is also assigned a Data memory address, mapping them
directly into the first 32 locations of the user Data Space. Although not being physically implemented as
SRAM locations, this memory organization provides great flexibility in access of the registers, as the X-,
Y-, and Z-pointer Registers can be set to index any register in the file.
11.4.1. The X-register, Y-register and Z-register
The registers R26:R31 have some added functions to their general purpose usage. These registers are
16-bit address pointers for indirect addressing of the Data Space. The three indirect address registers X,
Y and Z are defined as described in the following figure.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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