Datasheet

24.5.3. SPDR – SPI Data Register is a read/write register
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: SPDR
Offset: 0x0F
Reset: 0xXX
Property: When addressing I/O Registers as data space the offset address is 0x2F
Bit 7 6 5 4 3 2 1 0
SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset x x x x x x x x
Bits 7:0 – SPIDn: SPI Data
The SPI Data Register is a read/write register used for data transfer between the Register File and the
SPI Shift Register. Writing to the register initiates data transmission. Reading the register causes the Shift
Register Receive buffer to be read.
• SPID7 is MSB
• SPID0 is LSB
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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