Datasheet

24. SPI – Serial Peripheral Interface
24.1. Features
Full-duplex, Three-wire Synchronous Data Transfer
Master or Slave Operation
LSB First or MSB First Data Transfer
Seven Programmable Bit Rates
End of Transmission Interrupt Flag
Write Collision Flag Protection
Wake-up from Idle Mode
Double Speed (CK/2) Master SPI Mode
24.2. Overview
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the
ATmega64A and peripheral devices or between several AVR devices.
Figure 24-1 SPI Block Diagram
(1)
SPI2X
SPI2X
DIVIDER
/2/4/8/16/32/64/128
Note:  1. Refer to Pin Configurations, table Port B Pins Alternate Functions in Alternate Functions of Port
B for SPI pin placement.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
235