Datasheet

Figure 22-10 Timer/Counter Timing Diagram, Setting of OCF2, with Prescaler (f
clk_I/O
/8)
OCFn
OCRn
TCNTn
OCRn Value
OCRn - 1 OCRn OCRn + 1 OCRn + 2
clk
I/O
clk
Tn
(clk
I/O
/8)
The next figure shows the setting of OCF2 and the clearing of TCNT2 in CTC mode.
Figure 22-11 Timer/Counter Timing Diagram, Clear Timer on Compare Match Mode, with Prescaler (f
clk_I/O
/8)
OCFn
OCRn
TCNTn
(CTC)
TOP
TOP - 1 TOP BOTTOM BOTTOM + 1
clk
I/O
clk
Tn
(clk
I/O
/8)
22.9. Register Description
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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