Datasheet

21.11.1. TCCR0 – Timer/Counter Control Register
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: TCCR0
Offset: 0x33
Reset: 0x00
Property: When addressing I/O Registers as data space the offset address is 0x53
Bit 7 6 5 4 3 2 1 0
FOC0 WGM01 COM01 COM00 WGM00 CS02 CS01 CS00
Access
W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bit 7 – FOC0: Force Output Compare
The FOC0 bit is only active when the WGM bits specify a non-PWM mode. However, for ensuring
compatibility with future devices, this bit must be set to zero when TCCR0 is written when operating in
PWM mode. When writing a logical one to the FOC0 bit, an immediate Compare Match is forced on the
waveform generation unit. The OC0 output is changed according to its COM01:0 bits setting. Note that
the FOC0 bit is implemented as a strobe. Therefore it is the value present in the COM01:0 bits that
determines the effect of the forced compare.
A FOC0 strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0 as
TOP.
The FOC0 bit is always read as zero.
Bits 5:4 – COM0n: Compare Match Output Mode [n = 1:0]
These bits control the Output Compare Pin (OC0) behavior. If one or both of the COM01:0 bits are set,
the OC0 output overrides the normal port functionality of the I/O pin it is connected to. However, note that
the Data Direction Register (DDR) bit corresponding to OC0 pin must be set in order to enable the output
driver.
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the WGM01:0 bit
setting. The following table shows the COM01:0 bit functionality when the WGM01:0 bits are set to a
normal or CTC mode (non-PWM).
Table 21-3 Compare Output Mode, Non-PWM Mode
COM01 COM00 Description
0 0 Normal port operation, OC0 disconnected.
0 1 Toggle OC0 on Compare Match
1 0 Clear OC0 on Compare Match
1 1 Set OC0 on Compare Match
The next table shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast PWM mode.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
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