Datasheet

20.11.22. OCR3CH – Output Compare Register 3 C High byte
Name: OCR3CH
Offset: 0x83
Reset: 0x00
Property: –
Bit 7 6 5 4 3 2 1 0
OCR3CH[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – OCR3CH[7:0]: Output Compare 3 C High byte
The Input Capture is updated with the counter (TCNTn) value each time an event occurs on the ICPn pin
(or optionally on the Analog Comparator Output for Timer/Counter1). The Input Capture can be used for
defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This Temporary Register is shared by all the other 16-bit registers.
Refer to Accessing 16-bit Registers on page 140 for details.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
182