Datasheet

20.11.7. TCNT1L – Timer/Counter1 Low byte
When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When
addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these offset
addresses. The device is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space
from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: TCNT1L
Offset: 0x2C
Reset: 0x00
Property: When addressing I/O Registers as data space the offset address is 0x4C
Bit 7 6 5 4 3 2 1 0
TCNT1L[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – TCNT1L[7:0]: Timer/Counter 1 Low byte
Refer to TCNT3H.
Atmel ATmega64A [DATASHEET]
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