Datasheet

20.11.4. TCCR3B – Timer/Counter3 Control Register B
Name:  TCCR3B
Offset:  0x8A
Reset:  0x00
Property:
 
Bit 7 6 5 4 3 2 1 0
ICNC3 ICES3 WGM33 WGM32 CS32 CS31 CS30
Access
R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0
Bit 7 – ICNC3: Input Capture Noise Canceler
Setting this bit (to one) activates the Input Capture Noise Canceler. When the Noise Canceler is
activated, the input from the Input Capture Pin (ICPn) is filtered. The filter function requires four
successive equal valued samples of the ICPn pin for changing its output. The Input Capture is therefore
delayed by four Oscillator cycles when the noise canceler is enabled.
Bit 6 – ICES3: Input Capture Edge Select
This bit selects which edge on the Input Capture Pin (ICPn) that is used to trigger a capture event. When
the ICESn bit is written to zero, a falling (negative) edge is used as trigger, and when the ICESn bit is
written to one, a rising (positive) edge will trigger the capture.
When a capture is triggered according to the ICESn setting, the counter value is copied into the Input
Capture Register (ICRn). The event will also set the Input Capture Flag (ICFn), and this can be used to
cause an Input Capture Interrupt, if this interrupt is enabled.
When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in the TCCRnA and
the TCCRnB Register), the ICPn is disconnected and consequently the Input Capture function is
disabled.
Bit 4 – WGM33: Waveform Generation Mode
Refer to TCCR3A.
Bit 3 – WGM32: Waveform Generation Mode
Refer to TCCR3A.
Bits 2:0 – CS3n: Clock Select [n = 0:2]
The three Clock Select bits select the clock source to be used by the Timer/Counter. Refer to Figure
20-10 Timer/Counter Timing Diagram, Setting of OCFnx, no Prescaling on page 156 and Figure 20-11 
Timer/Counter Timing Diagram, Setting of OCFnx, with Prescaler (fclk_I/O/8) on page 156.
Table 20-6 Clock Select Bit Description
CA12 CA11 CS10 Description
0 0 0 No clock source (Timer/Counter stopped).
0 0 1 clk
I/O
/1 (No prescaling)
0 1 0 clk
I/O
/8 (From prescaler)
0 1 1 clk
I/O
/64 (From prescaler)
Atmel ATmega64A [DATASHEET]
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