Datasheet

Figure 20-1 16-bit Timer/Counter Block Diagram
(1)
Clock Select
Timer/Counter
DATA BUS
OCRnA
OCRnB
ICRn
=
TCNTn
Waveform
Generation
Waveform
Generation
OCnA
OCnB
Noise
Canceler
ICPn
=
Fixed
TOP
Values
Edge
Detector
Control Logic
= 0
TOP BOTTOM
Count
Clear
Direction
TOVn
(Int.Req.)
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
ICFn (Int.Req.)
TCCRnA TCCRnB
TCCRnC
( From Analog
Comparator Ouput )
Tn
Edge
Detector
( From Prescaler )
clk
Tn
=
=
Waveform
Generation
OCnC
OCFnC
(Int.Req.)
OCRnC
Note: 1. Refer to Pin Configurations, table Port B Pins Alternate Functions in Alternate Functions of Port
B, and Port E Pins Alternate Functions in Alternate Functions of Port E for Timer/Counter1 and 3 pin
placement and description.
Related Links
Pin Configurations on page 14
Alternate Functions of Port B on page 100
Alternate Functions of Port E on page 105
20.2.1. Registers
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Capture Register
(ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-bit registers.
These procedures are described in the section Accessing 16-bit Registers on page 140. The Timer/
Counter Control Registers (TCCRnA/B/C) are 8-bit registers and have no CPU access restrictions.
Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag
Register (TIFR) and Extended Timer Interrupt Flag Register (ETIFR). All interrupts are individually
masked with the Timer Interrupt Mask Register (TIMSK) and Extended Timer Interrupt Mask Register
(ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure since these registers are shared by other
timer units.
Atmel ATmega64A [DATASHEET]
Atmel-8160E-ATmega64A_Datasheet_Complete-09/2015
138