Datasheet
25.4. Prescaling and Conversion Timing...........................................................................................305
25.5. Changing Channel or Reference Selection.............................................................................. 308
25.6. ADC Noise Canceler................................................................................................................ 310
25.7. ADC Conversion Result............................................................................................................314
25.8. Register Description................................................................................................................. 316
26. JTAG Interface and On-chip Debug System..........................................................326
26.1. Features................................................................................................................................... 326
26.2. Overview...................................................................................................................................326
26.3. TAP – Test Access Port............................................................................................................327
26.4. TAP Controller.......................................................................................................................... 328
26.5. Using the Boundary-scan Chain...............................................................................................329
26.6. Using the On-chip Debug System............................................................................................ 329
26.7. On-chip Debug Specific JTAG Instructions.............................................................................. 330
26.8. Using the JTAG Programming Capabilities.............................................................................. 330
26.9. Bibliography..............................................................................................................................331
26.10. IEEE 1149.1 (JTAG) Boundary-scan........................................................................................331
26.11. Data Registers..........................................................................................................................332
26.12. Boundry-scan Specific JTAG Instructions................................................................................ 333
26.13. Boundary-scan Chain...............................................................................................................335
26.14. ATmega644A Boundary-scan Order........................................................................................ 338
26.15. Boundary-scan Description Language Files............................................................................ 340
26.16. Register Description.................................................................................................................340
27. BTLDR - Boot Loader Support – Read-While-Write Self-Programming................ 345
27.1. Features................................................................................................................................... 345
27.2. Overview...................................................................................................................................345
27.3. Application and Boot Loader Flash Sections............................................................................345
27.4. Read-While-Write and No Read-While-Write Flash Sections...................................................346
27.5. Entering the Boot Loader Program...........................................................................................348
27.6. Boot Loader Lock Bits.............................................................................................................. 349
27.7. Addressing the Flash During Self-Programming...................................................................... 350
27.8. Self-Programming the Flash.....................................................................................................351
27.9. Register Description................................................................................................................. 359
28. MEMPROG- Memory Programming......................................................................362
28.1. Program And Data Memory Lock Bits...................................................................................... 362
28.2. Fuse Bits...................................................................................................................................363
28.3. Signature Bytes........................................................................................................................ 366
28.4. Calibration Byte........................................................................................................................ 366
28.5. Serial Number...........................................................................................................................366
28.6. Page Size................................................................................................................................. 366
28.7. Parallel Programming Parameters, Pin Mapping, and Commands..........................................367
28.8. Parallel Programming...............................................................................................................369
28.9. Serial Downloading...................................................................................................................376
28.10. Programming Via the JTAG Interface.......................................................................................381
29. Electrical Characteristics....................................................................................... 395
29.1. Absolute Maximum Ratings......................................................................................................395
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
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