Datasheet

28.9.4. SPI Serial Programming Characteristics
Figure 28-8. Serial Programming Waveforms
MSB
MSB
LSB
LSB
SERIAL CLOCK INPUT
(SCK)
SERIAL DATA INPUT
(MOSI)
(MISO)
SAMPLE
SERIAL DATA OUTPUT
28.10. Programming Via the JTAG Interface
Programming through the JTAG interface requires control of the four JTAG specific pins: TCK, TMS, TDI,
and TDO. Control of the Reset and clock pins is not required.
To be able to use the JTAG interface, the JTAGEN fuse must be programmed. The device is default
shipped with the Fuse programmed. In addition, the JTD bit in MCUCSR must be cleared. Alternatively, if
the JTD bit is set, the external reset can be forced low. Then, the JTD bit will be cleared after two chip
clocks, and the JTAG pins are available for programming. This provides a means of using the JTAG pins
as normal port pins in running mode while still allowing In-System Programming via the JTAG interface.
Note that this technique can not be used when using the JTAG pins for Boundary-scan or On-chip Debug.
In these cases the JTAG pins must be dedicated for this purpose.
As a definition in this data sheet, the LSB is shifted in and out first of all Shift Registers.
28.10.1. Programming Specific JTAG Instructions
The instruction register is 4-bit wide, supporting up to 16 instructions. The JTAG instructions useful for
Programming are listed below.
The OPCODE for each instruction is shown behind the instruction name in hex format. The text describes
which data register is selected as path between TDI and TDO for each instruction.
The Run-Test/Idle state of the TAP controller is used to generate internal clocks. It can also be used as an
idle state between JTAG sequences. The state machine sequence for changing the instruction word is
shown in the figure below.
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
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