Datasheet

Table 28-11. No. of Words in a Page and No. of Pages in the EEPROM
Device EEPROM
Size
Page
Size
PCWORD No. of
Pages
PCPAGE EEAMSB
ATmega644A 2Kbytes 8bytes EEA[2:0] 256 EEA[10:2] 10
28.7. Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify Flash Program memory, EEPROM Data
memory, Memory Lock bits, and Fuse bits in the device. Pulses are assumed to be at least 250ns unless
otherwise noted.
28.7.1. Signal Names
In this section, some pins of this device are referenced by signal names describing their functionality
during parallel programming, please refer to Figure. Parallel Programming and Table. Pin Name Mapping
in this section. Pins not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit
coding is shown in the table, XA1 and XA0 Coding.
When pulsing WR or OE, the command loaded determines the action executed. The different Commands
are shown in the table, Command Byte Bit Coding Command Byte Command Executed.
Figure 28-1. Parallel Programming
VCC
GND
XTAL1
PD1
PD2
PD3
PD4
PD5
PD6
PB[7:0]
DATA
RESET
PD7
+12V
BS1
XA0
XA1
OE
RDY/BSY
PAGEL
PC2
WR
BS2
AVCC
+4.5 - 5.5V
+4.5 - 5.5V
Note: V
CC
- 0.3V < AV
CC
< V
CC
+ 0.3V, however, AV
CC
should always be within 4.5 - 5.5V
Table 28-12. Pin Name Mapping
Signal Name in
Programming Mode
Pin Name I/O Function
RDY/BSY PD1 O 0: Device is busy programming, 1: Device is ready for new
command
OE PD2 I Output Enable (Active low)
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
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