Datasheet

Figure 23-16. Formats and States in the Slave Transmitter Mode
S SLA R A DATA A
0xA8 0xB8
A
0xB0
Reception of the o wn
sla v e address and one or
more data b ytes
Last data b yte tr ansmitted.
Switched to not addressed
slave (TWEA = '0')
Arbitration lost as master
and addressed as sla v e
n
From master to sla v e
From slave to master
Any number of data b ytes
and their associated ac kno wledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Ser ial Bus. The
prescaler bits are z ero or mask ed to z ero
P or SDATA
0xC0
DATA A
A
0xC8
P or SAll 1's
A
23.7.4. Slave Receiver Mode
In the Slave Receiver (SR) mode, a number of data bytes are received from a Master Transmitter (see
figure below). All the status codes mentioned in this section assume that the prescaler bits are zero or are
masked to zero.
Figure 23-17. Data transfer in Slave Receiver mode
Device 3
Device n
SD A
SCL
........
R1 R2
V
CC
Device 2
MASTER
TRANSMITTER
Device 1
SLA VE
RECEIVER
To initiate the SR mode, the TWI (Slave) Address Register n (TWARn) and the TWI Control Register n
(TWCRn) must be initialized as follows:
The upper seven bits of TWARn are the address to which the 2-wire Serial Interface will respond when
addressed by a Master (TWARn.TWA[6:0]). If the LSB of TWARn is written to TWARn.TWGCI=1, the TWI
n will respond to the general call address (0x00), otherwise it will ignore the general call address.
TWCRn must hold a value of the type TWCRn=0100010x - TWCRn.TWEN must be written to '1' to
enable the TWI. TWCRn.TWEA bit must be written to '1' to enable the acknowledgment of the device’s
own slave address or the general call address. TWCRn.TWSTA and TWSTO must be written to zero.
Atmel ATmega644A [DATASHEET]
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