Datasheet

Figure 23-7. SCL Synchronization Between Multiple Masters
T A
low
T A
high
SCL from
Master A
SCL from
Master B
SCL Bus
Line
TB
low
TB
high
Masters Start
Counting Low Period
Masters Start
Counting High Period
Arbitration is carried out by all masters continuously monitoring the SDA line after outputting data. If the
value read from the SDA line does not match the value the Master had output, it has lost the arbitration.
Note that a Master can only lose arbitration when it outputs a high SDA value while another Master
outputs a low value. The losing Master should immediately go to Slave mode, checking if it is being
addressed by the winning Master. The SDA line should be left high, but losing masters are allowed to
generate a clock signal until the end of the current data or address packet. Arbitration will continue until
only one Master remains, and this may take many bits. If several masters are trying to address the same
Slave, arbitration will continue into the data packet.
Figure 23-8. Arbitration Between Two Masters
SD A from
Master A
SD A from
Master B
SD A Line
Synchroniz ed
SCL Line
START
Master A Loses
Arbitration, SD A
A
SD A
Note that arbitration is not allowed between:
• A REPEATED START condition and a data bit
• A STOP condition and a data bit
• A REPEATED START and a STOP condition
It is the user software’s responsibility to ensure that these illegal arbitration conditions never occur. This
implies that in multi-master systems, all data transfers must use the same composition of SLA+R/W and
Atmel ATmega644A [DATASHEET]
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