Master SPI Mode: The UCPOL bit sets the polarity of the XCKn clock. The combination of the UCPOL
and UCPHA bit settings determine the timing of the data transfer. Refer to the SPI Data Modes and
Timing for details.
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
250
