Datasheet

20.5.3. SPI Data Register 0
When addressing I/O Registers as data space using LD and ST instructions, the provided offset must be
used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an
I/O address offset within 0x00 - 0x3F.
The device is a complex microcontroller with more peripheral units than can be supported within the 64
locations reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 in
SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Name: SPDR0
Offset: 0x4E
Reset: 0xXX
Property: When addressing as I/O Register: address offset is 0x2E
Bit 7 6 5 4 3 2 1 0
SPID[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset x x x x x x x x
Bits 7:0 – SPID[7:0]: SPI Data
The SPI Data Register is a read/write register used for data transfer between the Register File and the
SPI Shift Register. Writing to the register initiates data transmission. Reading the register causes the Shift
Register Receive buffer to be read.
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
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