Datasheet

Figure 19-9. Timer/Counter Timing Diagram, with Prescaler (f
clk_I/O
/8)
TOVn
TCNTn MAX - 1 MAX BOTTOM BOTTOM + 1
clk
I/O
clk
Tn
(clk
I/O
/8)
The following figure shows the setting of OCF2A in all modes except CTC mode.
Figure 19-10. Timer/Counter Timing Diagram, Setting of OCF2A, with Prescaler (f
clk_I/O
/8)
OCFnx
OCRnx
TCNTn
OCRnx Value
OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2
clk
I/O
clk
Tn
(clk
I/O
/8)
The following figure shows the setting of OCF2A and the clearing of TCNT2 in CTC mode.
Figure 19-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Prescaler (f
clk_I/O
/8)
OCFnx
OCRnx
TCNTn
(CTC)
TOP
TOP - 1 TOP BOTTOM BOTTOM + 1
clk
I/O
clk
Tn
(clk
I/O
/8)
19.9. Asynchronous Operation of Timer/Counter2
When TC2 operates asynchronously, some considerations must be taken:
• When switching between asynchronous and synchronous clocking of TC2, the registers TCNT2,
OCR2x, and TCCR2x might be corrupted. A safe procedure for switching clock source is:
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
199