Datasheet

– OC0A: Output Compare Match A output. The PB3 pin can serve as an external output for the
Timer/Counter0 Output Compare. The pin has to be configured as an output (DDB3 set “1”) to
serve this function. The OC0A pin is also the output pin for the PWM mode timer function.
– PCINT11: Pin Change Interrupt source 11. The PB3 pin can serve as an external interrupt
source.
• AIN0/INT2/PCINT10 – Port B, Bit 2
– AIN0: Analog Comparator Positive input. This pin is directly connected to the positive input of
the Analog Comparator.
– INT2: External Interrupt source 2. The PB2 pin can serve as an External Interrupt source to
the MCU.
– PCINT10: Pin Change Interrupt source 10. The PB2 pin can serve as an external interrupt
source.
• T1/CLKO/PCINT9 – Port B, Bit 1
– T1: Timer/Counter1 counter source.
– CLKO: Divided System Clock: The divided system clock can be output on the PB1 pin. The
divided system clock will be output if the CKOUT Fuse is programmed, regardless of the
PORTB1 and DDB1 settings. It will also be output during reset.
– PCINT9: Pin Change Interrupt source 9. The PB1 pin can serve as an external interrupt
source.
• T0/XCK0/PCINT8 – Port B, Bit 0
– T0: Timer/Counter0 counter source.
– XCK0: USART0 External clock. The Data Direction Register (DDB0) controls whether the
clock is output (DDB0 set “1”) or input (DDB0 cleared). The XCK0 pin is active only when the
USART0 operates in Synchronous mode.
– PCINT8: Pin Change Interrupt source 8. The PB0 pin can serve as an external interrupt
source.
Table 15-7 and Table 15-8 relate the alternate functions of Port B to the overriding signals shown in
Figure 15-5. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is
divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.
Table 15-7. Overriding Signals for Alternate Functions in PB[7:4]
Signal
Name
PB7/SCK/PCINT15 PB6/MISO/PCINT14 PB5/MOSI/PCINT13 PB4/SS/OC0B/PCINT12
PUOE SPE • MSTR SPE • MSTR SPE • MSTR SPE • MSTR
PUOV PORTB7 • PUD PORTB6 • PUD PORTB5 • PUD PORTB4 • PUD
DDOE SPE • MSTR SPE • MSTR SPE • MSTR SPE • MSTR
DDOV 0 0 0 0
PVOE
SPE • MSTR SPE • MSTR
SPE • MSTR OC0B ENABLE
PVOV SCK OUTPUT SPI SLAVE OUTPUT SPI MSTR OUTPUT OC0B
DIEOE PCINT15 • PCIE1 PCINT14 • PCIE1 PCINT13 • PCIE1 PCINT12 • PCIE1
DIEOV 1 1 1 1
Atmel ATmega644A [DATASHEET]
Atmel-42716C-ATmega644A_Datasheet_Complete-10/2016
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