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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
3. The serial programming instructions will not work if the communication is out of synchronization. When in
sync. the second byte (0x53), will echo back when issuing the third byte of the Programming Enable instruc-
tion. Whether the echo is correct or not, all four bytes of the instruction must be transmitted. If the 0x53 did
not echo back, give RESET
a positive pulse and issue a new Programming Enable command.
4. The Flash is programmed one page at a time. The memory page is loaded one byte at a time by supplying
the 7 LSB of the address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data low byte must be loaded before data high byte is applied for a given
address. The Program Memory Page is stored by loading the Write Program Memory Page instruction with
the address lines 15:8. Before issuing this command, make sure the instruction Load Extended Address
Byte has been used to define the MSB of the address. The extended address byte is stored until the com-
mand is re-issued, that is, the command needs only be issued for the first page, and when crossing the
64KWord boundary. If polling (
RDY/BSY) is not used, the user must wait at least t
WD_FLASH
before issuing the
next page (see Table 30-16). Accessing the serial programming interface before the Flash write operation
completes can result in incorrect programming.
5. The EEPROM array is programmed one byte at a time by supplying the address and data together with the
appropriate Write instruction. An EEPROM memory location is first automatically erased before new data is
written. If polling is not used, the user must wait at least t
WD_EEPROM
before issuing the next byte (see Table
30-16). In a chip erased device, no 0xFFs in the data file(s) need to be programmed.
6. Any memory location can be verified by using the Read instruction which returns the content at the selected
address at serial output PDO. When reading the Flash memory, use the instruction Load Extended Address
Byte to define the upper address byte, which is not included in the Read Program Memory instruction. The
extended address byte is stored until the command is re-issued, that is, the command needs only be issued
for the first page, and when crossing the 64KWord boundary.
7. At the end of the programming session, RESET
can be set high to commence normal operation.
8. Power-off sequence (if needed):
Set RESET
to “1”.
Tur n V
CC
power off.
30.8.3 Serial Programming Instruction set
Table 30-17 and Figure 30-11 on page 342 describes the Instruction set.
Table 30-16. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Symbol Minimum Wait Delay
t
WD_FLASH
4.5ms
t
WD_EEPROM
3.6ms
t
WD_ERASE
9.0ms
Table 30-17. Serial Programming Instruction Set
Instruction/Operation
Instruction Format
Byte 1 Byte 2 Byte 3 Byte 4
Programming Enable $AC $53 $00 $00
Chip Erase (Program Memory/EEPROM) $AC $80 $00 $00
Poll RDY/BSY
$F0 $00 $00 data byte out
Load Instructions
Load Extended Address byte
(1)
$4D $00 Extended adr $00
Load Program Memory Page, High byte $48 $00 adr LSB high data byte in
Load Program Memory Page, Low byte $40 $00 adr LSB low data byte in