Datasheet

186
ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the
pin is configured as an output. This feature allows software control of the counting.
20.10.3 TCNT2 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit
counter. Writing to the TCNT2 Register blocks (removes) the Compare Match on the following timer clock. Modify-
ing the counter (TCNT2) while the counter is running, introduces a risk of missing a Compare Match between
TCNT2 and the OCR2x Registers.
20.10.4 OCR2A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the counter value
(TCNT2). A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the
OC2A pin.
20.10.5 OCR2B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the counter value
(TCNT2). A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the
OC2B pin.
101 clk
T2S
/128 (From prescaler)
110 clk
T
2
S
/256 (From prescaler)
111 clk
T
2
S
/1024 (From prescaler)
Table 20-9. Clock Select Bit Description (Continued)
CS22 CS21 CS20 Description
Bit 76543210
(0xB2) TCNT2[7:0] TCNT2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
(0xB3) OCR2A[7:0] OCR2A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
(0xB4) OCR2B[7:0] OCR2B
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000