Datasheet

331
2490R–AVR–02/2013
ATmega64(L)
Figure 158. SPI Interface Timing Requirements (Slave Mode)
MISO
(Data Output)
SCK
(CPOL = 1)
MOSI
(Data Input)
SCK
(CPOL = 0)
SS
MSB LSB
LSBMSB
...
...
10
11 11
1213 14
17
15
9
X
16
18