Datasheet

97
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
16. 16-bit Timer/Counter1 with PWM
16.1 Features
● True 16-bit design (i.e., allows 16-bit PWM)
● Two independent output compare units
● Double buffered output compare registers
● One input capture unit
● Input capture noise canceler
● Clear timer on compare match (auto reload)
● Glitch-free, phase correct pulse width modulator (PWM)
● Variable PWM period
● Frequency generator
● External event counter
● Four independent interrupt sources (TOV1, OCF1A, OCF1B, and ICF1)
16.2 Overview
The 16-bit Timer/Counter unit allows accurate program execution timing (event management), wave generation, and signal
timing measurement.
Most register and bit references in this section are written in general form. A lower case “n” replaces the Timer/Counter
number, and a lower case “x” replaces the output compare unit channel. However, when using the register or bit defines in a
program, the precise form must be used, i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 16-1 on page 98. For the actual placement of I/O
pins, refer to Section 1-1 “Pinout Atmel ATmega48PA/88PA/168PA” on page 3. CPU accessible I/O Registers, including I/O
bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the
Section 16.11 “Register Description” on page 116.
The PRTIM1 bit in Section 10.11.3 “PRR – Power Reduction Register” on page 40 must be written to zero to enable
Timer/Counter1 module.