Datasheet

255
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
28.5 Page Size
28.6 Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify flash program memory, EEPROM data memory, memory lock bits,
and fuse bits in the Atmel
®
ATmega48PA/88PA/168PA. Pulses are assumed to be at least 250 ns unless otherwise noted.
28.6.1 Signal Names
In this section, some pins of the Atmel ATmega48PA/88PA/168PA are referenced by signal names describing their
functionality during parallel programming, see Figure 28-1 and Table 28-11. Pins not described in the following table are
referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in
Table 28-13.
When pulsing WR
or OE, the command loaded determines the action executed. The different commands are shown in Table
28-14.
Figure 28-1. Parallel Programming
Note: V
CC
– 0.3V < AV
CC
< V
CC
+ 0.3V, however, AV
CC
should always be within 4.5 to 5.5V
Table 28-9. No. of Words in a Page and No. of Pages in the Flash
Device Flash Size Page Size PCWORD
No. of
Pages PCPAGE PCMSB
Atmel ATmega48PA/
88PA/168PA
2K words
(4K bytes)
32 words PC[4:0] 64 PC[10:5] 10
Atmel ATmega88PA
4K words
(8K bytes)
32 words PC[4:0] 128 PC[11:5] 11
Atmel ATmega168PA
8K words
(16K bytes)
64 words PC[5:0] 128 PC[12:6] 12
Table 28-10. No. of Words in a Page and No. of Pages in the EEPROM
Device
EEPROM
Size
Page
Size
PCWORD
No. of
Pages
PCPAGE EEAMSB
Atmel ATmega48PA/
88PA/168PA
256 bytes 4 bytes EEA[1:0] 64 EEA[7:2] 7
Atmel ATmega88PA 512 bytes 4 bytes EEA[1:0] 128 EEA[8:2] 8
Atmel ATmega168PA 512 bytes 4 bytes EEA[1:0] 128 EEA[8:2] 8
GND
XTAL1
PC2
PD1
PD2
PD3
PD4
DATA
PD5
PD6
PD7
RESET
VCC
AVCC
PC[1:0]:PB[5:0]
+ 4.5V to 5.5V
+ 4.5V to 5.5V
RDY/BSY
OE
WR
BS1
XA0
XA1
PAGEL
+12V
BS2