Datasheet

ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
252
28.2 Fuse Bits
The Atmel
®
ATmega48PA/88PA/168PA has three Fuse bytes. Table 28-5 to Table 28-7 describe briefly the functionality of all
the fuses and how they are mapped into the Fuse bytes. Note that the fuses are read as logical zero, “0”, if they are
programmed.
Table 28-3. Lock Bit Protection Modes
(1)(2)
(only Atmel ATmega48PA/88PA/168PA)
BLB0 Mode BLB02 BLB01
1 1 1 No restrictions for SPM or LPM accessing the application section.
2 1 0 SPM is not allowed to write to the application section.
3 0 0
SPM is not allowed to write to the application section, and LPM executing
from the boot loader section is not allowed to read from the application
section. If interrupt vectors are placed in the boot loader section, interrupts
are disabled while executing from the application section.
4 0 1
LPM executing from the boot loader section is not allowed to read from the
application section. If interrupt vectors are placed in the boot loader section,
interrupts are disabled while executing from the application section.
BLB1 Mode BLB12 BLB11
1 1 1 No restrictions for SPM or LPM accessing the boot loader section.
2 1 0 SPM is not allowed to write to the boot loader section.
3 0 0
SPM is not allowed to write to the boot loader section, and LPM executing
from the application section is not allowed to read from the boot loader
section. If interrupt vectors are placed in the application section, interrupts
are disabled while executing from the boot loader section.
4 0 1
LPM executing from the application section is not allowed to read from the
boot loader section. If interrupt vectors are placed in the application section,
interrupts are disabled while executing from the boot loader section.
Notes: 1. Program the fuse bits and boot lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
Table 28-4. Extended Fuse Byte for the Atmel ATmega48PA
Extended Fuse Byte Bit No Description Default Value
7 1
6 1
5 1
4 1
3 1
2 1
1 1
SELFPRGEN 0 Self programming enable 1 (unprogrammed)