Datasheet

163
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
The receive function example reads all the I/O registers into the register file before any computation is done. This gives an
optimal receive buffer utilization since the buffer location read will be free to accept new data as early as possible.
20.7.3 Receive Compete Flag and Interrupt
The USART receiver has one flag that indicates the receiver state.
The receive complete (RXCn) flag indicates if there are unread data present in the receive buffer. This flag is one when
unread data exist in the receive buffer, and zero when the receive buffer is empty (i.e., does not contain any unread data). If
the receiver is disabled (RXENn = 0), the receive buffer will be flushed and consequently the RXCn bit will become zero.
When the receive complete interrupt enable (RXCIEn) in UCSRnB is set, the USART receive complete interrupt will be
executed as long as the RXCn flag is set (provided that global interrupts are enabled). When interrupt-driven data reception
is used, the receive complete routine must read the received data from UDRn in order to clear the RXCn flag, otherwise a
new interrupt will occur once the interrupt routine terminates.
Assembly Code Example
(1)
USART_Receive:
; Wait for data to be received
in r16, UCSRnA
sbrs r16, RXCn
rjmp USART_Receive
; Get status and 9th bit, then data from buffer
in r18, UCSRnA
in r17, UCSRnB
in r16, UDRn
; If error, return -1
andi r18,(1<<FEn)|(1<<DORn)|(1<<UPEn)
breq USART_ReceiveNoError
ldi r17, HIGH(-1)
ldi r16, LOW(-1)
USART_ReceiveNoError:
; Filter the 9th bit, then return
lsr r17
andi r17, 0x01
ret
C Code Example
(1)
unsigned int USART_Receive(void)
{
unsigned char status, resh, resl;
/* Wait for data to be received */
while (!(UCSRnA & (1<<RXCn)))
;
/* Get status and 9th bit, then data */
/* from buffer */
status = UCSRnA;
resh = UCSRnB;
resl = UDRn;
/* If error, return -1 */
if (status & (1<<FEn)|(1<<DORn)|(1<<UPEn))
return -1;
/* Filter the 9th bit, then return */
resh = (resh >> 1) & 0x01;
return ((resh << 8) | resl);
}
Note: 1. See Section 6. “About Code Examples” on page 7
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must
be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with
“SBRS”, “SBRC”, “SBR”, and “CBR”.