Datasheet
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
138
Table 18-4 shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase correct PWM mode.
• Bits 5:4 – COM2B1:0: Compare Match Output B Mode
These bits control the output compare pin (OC2B) behavior. If one or both of the COM2B1:0 bits are set, the OC2B output
overrides the normal port functionality of the I/O pin it is connected to. However, note that the data direction register (DDR)
bit corresponding to the OC2B pin must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the WGM22:0 bit setting. Table 18-5
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to a normal or CTC mode (non-PWM).
Table 18-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM mode.
Table 18-4. Compare Output Mode, Phase Correct PWM Mode
(1)
COM2A1 COM2A0 Description
0 0 Normal port operation, OC2A disconnected.
0 1
WGM22 = 0: Normal port operation, OC2A disconnected.
WGM22 = 1: Toggle OC2A on compare match.
1 0
Clear OC2A on compare match when up-counting. Set OC2A on compare match
when down-counting.
1 1
Set OC2A on compare match when up-counting. Clear OC2A on compare match
when down-counting.
Note: 1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the compare match is
ignored, but the set or clear is done at TOP. See Section 18.7.4 “Phase Correct PWM Mode” on page 132 for
more details.
Table 18-5. Compare Output Mode, non-PWM Mode
COM2B1 COM2B0 Description
0 0 Normal port operation, OC2B disconnected.
0 1 Toggle OC2B on Compare Match
1 0 Clear OC2B on Compare Match
1 1 Set OC2B on Compare Match
Table 18-6. Compare Output Mode, Fast PWM Mode
(1)
COM2B1 COM2B0 Description
0 0 Normal port operation, OC2B disconnected.
0 1 Reserved
1 0
Clear OC2B on compare match, set OC2B at BOTTOM,
(non-inverting mode).
1 1
Set OC2B on compare match, clear OC2B at BOTTOM,
(inverting mode).
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the compare match is
ignored, but the set or clear is done at BOTTOM.
See Section 18.7.4 “Phase Correct PWM Mode” on page 132 for more details.