Datasheet
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
10
• Bit 5 – H: Half Carry Flag
The half carry flag H indicates a half carry in some arithmetic operations. Half carry Is useful in BCD arithmetic.
See Section 32. “Instruction Set Summary” on page 317 for detailed information.
• Bit 4 – S: Sign Bit, S = N Å V
The S-bit is always an exclusive or between the negative flag N and the two’s complement overflow flag V.
See Section 32. “Instruction Set Summary” on page 317 for detailed information.
• Bit 3 – V: Two’s Complement Overflow Flag
The two’s complement overflow flag V supports two’s complement arithmetic. See
Section 32. “Instruction Set Summary” on page 317 for detailed information.
• Bit 2 – N: Negative Flag
The negative flag N indicates a negative result in an arithmetic or logic operation. See
Section 32. “Instruction Set Summary” on page 317 for detailed information.
• Bit 1 – Z: Zero Flag
The zero flag Z indicates a zero result in an arithmetic or logic operation. See
Section 32. “Instruction Set Summary” on page 317 for detailed information.
• Bit 0 – C: Carry Flag
The carry flag C indicates a carry in an arithmetic or logic operation. See Section 32. “Instruction Set Summary” on page 317
for detailed information.