Datasheet

ATmega16U4/32U4 [DATASHEET]

Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016

Figure 13-4. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform Generator if

either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or output) is still controlled by the

Data Direction Register (DDR) for the port pin. The Data Direction Register bit for the OC0x pin (DDR_OC0x)

must be set as output before the OC0x value is visible on the pin. The port override function is independent of

the Waveform Generation mode.

The design of the Output Compare pin logic allows initialization of the OC0x state before the output is enabled.

Note that some COM0x1:0 bit settings are reserved for certain modes of operation. See “8-bit Timer/Counter

13.5.1 Compare Output Mode and Waveform Generation

The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM modes. For all modes,

setting the COM0x1:0 = 0 tells the Waveform Generator that no action on the OC0x Register is to be performed

on the next Compare Match. For compare output actions in the non-PWM modes refer to Table 13-1 on

page 104. For fast PWM mode, refer to Table 13-2 on page 104, and for phase correct PWM refer to Table 13-

3 on page 105.

A change of the COM0x1:0 bits state will have effect at the first Compare Match after the bits are written. For

non-PWM modes, the action can be forced to have immediate effect by using the FOC0x strobe bits.

13.6 Modes of Operation

The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is defined by the

combination of the Waveform Generation mode (WGM02:0) and Compare Output mode (COM0x1:0) bits. The

Compare Output mode bits do not affect the counting sequence, while the Waveform Generation mode bits do.

The COM0x1:0 bits control whether the PWM output generated should be inverted or not (inverted or non-

inverted PWM). For non-PWM modes the COM0x1:0 bits control whether the output should be set, cleared, or

toggled at a Compare Match (See “Compare Match Output Unit” on page 97.).

For detailed timing information see “Timer/Counter Timing Diagrams” on page 102.

13.6.1 Normal Mode

The simplest mode of operation is the Normal mode (WGM02:0 = 0). In this mode the counting direction is

always up (incrementing), and no counter clear is performed. The counter simply overruns when it passes its

PORT

DDR

OCnx

Waveform

Generator

COMnx1

COMnx0

DATA BUS

FOCn

clk

I/O