Datasheet

389
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Figure 29-4. SPI Interface Timing Requirements (Master Mode)
Figure 29-5. SPI Interface Timing Requirements (Slave Mode)
29.9 Hardware Boot Entrance Timing Characteristics
Figure 29-6. Hardware Boot Timing Requirements
MOSI
(Data Output)
SCK
(CPOL = 1)
MISO
(Data Input)
SCK
(CPOL = 0)
SS
MSB LSB
LSBMSB
...
...
61
22
345
8
7
MISO
(Data Output)
SCK
(CPOL = 1)
MOSI
(Data Input)
SCK
(CPOL = 0)
SS
MSB LSB
LSBMSB
...
...
10
11 11
1213 14
17
15
9
X
16
Table 29-6. Hardware Boot Timings
Symbol Parameter Min. Max.
tSHRH
HWB low Setup before Reset High 0
tHHRH
HWB low Hold after Reset High
StartUpTime(SUT) +
Time Out Delay(TOUT)
RESET
ALE/HWB
t
SHRH
t
HHRH