Datasheet

385
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
1)The sum of all IOH, for ports A0-A7, G2, C4-C7 should not exceed 100mA.
2)The sum of all IOH, for ports C0-C3, G0-G1, D0-D7 should not exceed 100mA.
3)The sum of all IOH, for ports G3-G5, B0-B7, E0-E7 should not exceed 100mA.
4)The sum of all IOH, for ports F0-F7 should not exceed 100mA.
5. All DC Characteristics contained in this datasheet are based on simulation and characterization of other AVR
microcontrollers manufactured in the same process technology. These values are preliminary values representing design
targets, and will be updated after characterization of actual silicon
6. Values with “Power Reduction Register 1 - PRR1” disabled (0x00).
7. Maximum regulator output current should be reduced by the USB buffer current required when USB is active (about
25mA). The remaining regulator output current can be used for the external application.
8. As specified on the USB Electrical chapter, the D+/D- pads can withstand voltages down to -1V applied through a 39
resistor
29.3 External Clock Drive Waveforms
Figure 29-1. External Clock Drive Waveforms
29.4 External Clock Drive
Note: All DC Characteristics contained in this datasheet are based on simulation and characterization of other AVR
microcontrollers manufactured in the same process technology.
V
IL1
V
IH1
Table 29-2. External Clock Drive
Symbol Parameter
V
CC
=2.7-5.5V V
CC
=4.5-5.5V
UnitsMin. Max. Min. Max.
1/t
CLCL
Oscillator Frequency 0 8 0 16 MHz
t
CLCL
Clock Period 125 62.5 ns
t
CHCX
High Time 50 25 ns
t
CLCX
Low Time 50 25 ns
t
CLCH
Rise Time 1.6 0.5 s
t
CHCL
Fall Time 1.6 0.5 s
t
CLCL
Change in period from one clock
cycle to the next
2 2 %