Datasheet

371
ATmega16U4/32U4 [DATASHEET]
Atmel-7766J-USB-ATmega16U4/32U4-Datasheet_04/2016
Note: a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in,
x = don’t care.
28.8.2 Serial Programming Characteristics
For characteristics of the Serial Programming module see “SPI Timing Characteristics” on page 388.
28.9 Programming via the JTAG Interface
Programming through the JTAG interface requires control of the four JTAG specific pins: TCK, TMS, TDI, and
TDO. Control of the reset and clock pins is not required.
To be able to use the JTAG interface, the JTAGEN Fuse must be programmed. The device is default shipped
with the fuse programmed. In addition, the JTD bit in MCUCSR must be cleared. Alternatively, if the JTD bit is
set, the external reset can be forced low. Then, the JTD bit will be cleared after two chip clocks, and the JTAG
pins are available for programming. This provides a means of using the JTAG pins as normal port pins in
Running mode while still allowing In-System Programming via the JTAG interface. Note that this technique can
not be used when using the JTAG pins for Boundary-scan or On-chip Debug. In these cases the JTAG pins
must be dedicated for this purpose.
During programming the clock frequency of the TCK Input must be less than the maximum frequency of the
chip. The System Clock Prescaler can not be used to divide the TCK Clock Input into a sufficiently low
frequency.
As a definition in this datasheet, the LSB is shifted in and out first of all Shift Registers.
28.9.1 Programming Specific JTAG Instructions
The Instruction Register is 4-bit wide, supporting up to 16 instructions. The JTAG instructions useful for
programming are listed below.
The OPCODE for each instruction is shown behind the instruction name in hex format. The text describes which
Data Register is selected as path between TDI and TDO for each instruction.
The Run-Test/Idle state of the TAP controller is used to generate internal clocks. It can also be used as an idle
state between JTAG sequences. The state machine sequence for changing the instruction word is shown in
Figure 28-12 on page 372.
Read Fuse High bits
0101 1000 0000 1000 xxxx xxxx oooo oooo Read Fuse High bits. “0” = pro-
grammed, “1” = unprogrammed.
Read Extended Fuse Bits
0101 0000 0000 1000 xxxx xxxx oooo oooo Read Extended Fuse bits. “0” = pro-
grammed, “1” = unprogrammed. See
Table 28-3 on page 354 for details.
Read Calibration Byte 0011 1000 000x xxxx 0000 0000 oooo oooo Read Calibration Byte
Poll RDY/BSY
1111 0000 0000 0000 xxxx xxxx xxxx xxxo If o = “1”, a programming operation is
still busy. Wait until this bit returns to
“0” before applying another command.
Table 28-16. Serial Programming Instruction Set
Instruction
Instruction Format
OperationByte 1 Byte 2 Byte 3 Byte4